Lead DFT Engineer

About the role

We are looking for an experienced and highly motivated DFT Lead Engineer with strong expertise in Design-for-Test methodologies for complex SoC/ASIC designs. The ideal candidate should have hands-on experience in Scan Insertion, ATPG, MBIST, LBIST, JTAG, Silicon Bring-up & Debug , and should be capable of driving complete DFT implementation and signoff activities from RTL to silicon validation.

What you'll do

• Lead end-to-end DFT implementation for SoC subsystems
• Drive DFT RTL integration and verification activities
• Manage cross-functional coordination for DFT deliverables at block/subsystem level
• Implement full-scan DFT methodologies
• Develop and optimize scan insertion and compression techniques

What you need

• 5–8 yrs of experience
• VLSI
• B.Tech or B.E. or M.Tech