Lead MTS Logic Design

About the role

Rambus, a premier chip and silicon IP provider, is seeking to hire a motivated full-time Senior Design engineer to join our PCIe, CXL IP design team. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

What you'll do

• Contribute to the architecture and micro-architecture of next generation PCIe / CXL / AMBA controller IP
• Implement these designs in System Verilog
• Collaborate with the verification team to verify the IPs
• Participate in prototyping of the IPs in cutting edge FPGAs

What you need

• 7–13 yrs of experience
• Verilog
• Prototyping
• PhD or B.Tech or B.E.