Lead Product Engineer - Design Verification (MM/VIP)

About the role

Drives development of products and technologies and has material responsibility for the success of that product/technology. MM VIP PE is expected to become an expert in the Memory domain of Verification IP family – protocol and product-wise. The memory domain has many protocols such as SDRAM protocols (DDR5), SGRAM protocols (GDDR6), Memory Controller and PHY protocols (DFI), and others.

What you'll do

• Leads projects with high resource, risk and/or complexity
• Develops and leads large and multiple cross-functional and cross-organizational programs, initiatives, and activities with high resource requirements
• Continually evaluates technology effectiveness/data interoperability of complex systems
• Manages issue resolution with vendors on tech/product quality and functionality and influences vendor roadmap and direction of products
• Communicates highly complex ideas, anticipates potential objections and persuades others, often at senior levels, to adopt a different point of view

What you need

• 4–8 yrs of experience
• UVM
• Verilog
• System design
• Customer success
• Learning and development
• B.Tech or B.E. or M.Tech