Lead STA Engineer

About the role

Seeking a highly skilled and experienced Lead STA Engineer to lead and execute static timing analysis for complex semiconductor designs, ensuring timing closure and performance targets are met. This role involves guiding a team, developing methodologies, and collaborating with design and verification teams to deliver high-quality products.

What you'll do

• Cross-functional Collaboration: Partner with RTL, physical design, and DFT teams to ensure robust timing integration and refine timing models
• Drive a small team of STA engineers
• Should be able to do IP level synthesis
• More information about NXP in India

What you need

• 7–13 yrs of experience
• VLSI
• Python
• Perl
• B.Tech or B.E.