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Logic Lead

Flir·Pune

Pay not stated8–14 yrsFull-time

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About the role

For over 50 years, our engineering teams have designed cutting-edge test and measurement equipment that shapes the future of electronics. Industry giants rely on Frontline hardware—such as the X500e and the flagship Frontline X700 analyzer—to test and debug Bluetooth, Wi-Fi 7, and IoT ecosystems. Joining Teledyne LeCroy means collaborating within an agile, tech-focused culture to develop the crucial tools driving tomorrow's connected world.

What you'll do

  • Define FPGA architecture for protocol filtering, deep packet inspection, and capture engines
  • Design RTL for hardware accelerators, high-speed bus interfaces, and external memory controllers
  • Implement demodulators and decoders for Bluetooth (LE, Classic) and proprietary protocols
  • Optimize FPGA resources to maximize timing closure, throughput, and clock frequencies
  • Lead engineers through the complete FPGA development lifecycle from concept to hardware timing closure

What you need

  • 8–14 yrs of experience
  • FPGA
  • Verilog
  • EDR
  • UVM
  • IoT
  • B.Tech or B.E.

Good to have

  • C++
  • MATLAB
  • Python
  • C
  • Test automation

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