Member of Technical Staff - Microarchitect / RTL Design

About the role

Member of Technical Staff - Microarchitect / RTL Design at Architect Labs. As a Member of the Technical Staff on the RTL Design team at Architect, you'll own the AI-driven microarchitecture and RTL design of mission-critical SoC blocks and….

What you'll do

• Be expected to define, drive, and revise the block-level micro-arch specification for one of the fundamental HW accelerator blocks
• Own AI-driven RTL design flow end-to-end (at the frontend): through code generation to incorporating feedback from lint, CDC, synthesis
• Define and maintain interface specifications (e.g. AXI, AXI-Stream, or custom-built) for block- and SS-level integration
• Build and maintain RTL infrastructure for our in-house AI-driven flow: design automation scripts, regression flows, lint/CDC waivers, and integration collateral
• Close collaboration with SW and ML: Support and guide our SW and ML experts to revise and improve our in-house AI flow based on your own experience

What you need

• 5–9 yrs of experience
• Verilog
• Python
• Machine learning
• FPGA
• Prototyping
• Test cases
• PhD or B.Tech or B.E.