Physical Design Lead

About the role

As a Physical Design Lead Engineer, you will serve as a key technical leader responsible for the end-to-end physical implementation of complex SoCs and IPs on advanced technology nodes. You will own large and challenging design partitions or drive critical top-level physical design activities, including floorplanning, place-and-route, timing closure, and signoff.

What you'll do

• Lead and execute all aspects of physical design from RTL to GDSII, including synthesis, floorplanning, power planning, place and route, clock tree synthesis (CTS)
• Own the complete physical implementation of complex SoC partitions, subsystems, or top-level designs and drive closure to production-quality signoff
• Perform and drive advanced static timing analysis (STA), multi-corner multi-mode (MCMM) optimization, timing ECO implementation, and signoff closure
• Drive closure across power, performance, area, signal integrity (SI), electromigration (EM), IR-drop, reliability, and manufacturability targets
• Develop and optimize physical design methodologies, automation frameworks, flows, and scripts to improve design quality, efficiency, and turnaround time

What you need

• 15–27 yrs of experience
• VLSI
• Python
• ANSYS
• Perl
• Verilog
• B.Tech or B.E. or M.Tech