Post Silicon Validation

About the role

The Post-Silicon Validation Architect defines the validation strategy, test plans, and automation frameworks to bring up and qualify next-generation display chips. This role bridges hardware design, FPGA prototyping, and production software to ensure the silicon meets all functional, performance, and reliability targets before mass production.

What you'll do

• Test Development : Create comprehensive test plans covering display protocols, frame buffer management, pixel pipelines, and image processing algorithms
• Cross-functional Collaboration : Partner with Design, Pre-Silicon Verification (SV/UVM), Emulation, and Firmware teams to root-cause chip bugs

What you need

• 8–14 yrs of experience
• FPGA
• UVM
• Python
• Embedded C
• Instrumentation
• Verilog
• B.Tech or B.E.

Good to have

• Test cases
• Prototyping
• Computer vision
• JIRA
• Android
• Linux