Power Integrity Engineer

About the role

We are seeking a skilled Power Integrity (PI) Engineer to optimize power distribution networks for OSFP transceiver designs. You will collaborate with cross-functional teams to ensure robust, low-noise power delivery for high-speed silicon photonics, DSPs, and retimers, minimizing PDN impedance and electromagnetic interference in dense 800G+ modules.

What you'll do

• ⁠Perform PI simulations using tools like Ansys SIwave, Keysight ADS, or Cadence Sigrity to model and optimize PDN for OSFP modules
• Analyze and mitigate power rail decoupling, VRMs, and bypass capacitor placement for multi-rail supplies (0.8V core, 1.8V I/O
• ⁠Collaborate on PCB stackups, via optimization, and plane splitting to reduce simultaneous switching noise (SSN) and ground bounce in 112G PAM4 SerDes environments
• Validate designs through lab measurements using VNA, oscilloscopes, and power analyzers; correlate simulations with hardware prototypes
• ⁠Support signal integrity co-optimization, thermal-PD synergy (e.g., integrating TIMs with PDN), and compliance to IEEE 802.3ck/802.3df standards

What you need

• 5–9 yrs of experience
• Python
• ANSYS
• MATLAB
• Prototyping
• Power systems
• B.Tech or B.E.