Power Modelling Engineer, Staff

About the role

8 to 12 years of experience in Front end Power modeling, power estimation and power analysis of complex Qualcomm propriety DSP IP DSP design team is responsible for delivering high-performance DSP cores which are at the heart of Qualcomm's multi-tier SoC roadmap targeted for mobile space

What you'll do

• In this highly visible and interactive role, your primary responsibility will be to drive performance verification/correlation of DSP IP by working with global DSP…
• Responsible for analyzing power and performance efficiency across cores/chipsets
• Responsible for building infrastructure for performance verification and verifying performance of processors
• Work with front end power and backend teams to build power models, estimate power for AI/ML workloads
• Writing specific targeted tests to measure power and performance of the processor

What you need

• 4–7 yrs of experience
• C++
• C
• Python
• Verilog
• Troubleshooting
• Machine learning
• B.Tech or B.E. or B.Sc or BCA or M.Tech or PhD

Good to have

• Perl