Principal Engineer Design

About the role

#WeAreIn to transform theoretical concepts into real hardware designs. Are you in? Your role Key responsibilities in your new role an engineer, Timing Closure, and Constraints Coding/Validation Engineer, you will own the architectural timing intent, constraint hygiene, and complete timing sign-off for complex, multi-million gate SoCs. You will drive multi-mode

What you'll do

• Own the architectural timing intent, constraint hygiene, and complete
• Generate engineering change orders (ECOs) to fix setup, hold, max transition, and signal integrity violations
• Run strict constraints verification using industry-standard tools ( Synopsys TCM , SpyGlass Constraints , or Cadence CCD ) to eliminate unconstrained paths

What you need

• 13–23 yrs of experience
• Python
• VLSI
• Perl
• Customer success
• B.Tech or B.E.