Principal Engineer - Design Verification

About the role

We are seeking a diligent SoC/MCU Verification engineer to join our team at Renesas. The Verification engineer will be responsible for performing various verification tasks including Test Plan creation, Testcase creation, Coverage closure, Requirements traceability and Gate Level Simulation. They will also review system requirements and track quality assurance metrics.

What you'll do

• Drive Verification R&D team driving technical execution and best in class methodologies used in the design of advanced microcontrollers and microprocessors
• Work closely with system architects to understand high level specifications to be able to verify them
• Work with various EDA vendors to deploy next generation tools
• Build strong collaboration with other R&D teams such as RTL, DFT, digital IP, PD, Design Enablement, Emulation, and Validation to achieve project milestones
• Promote continuous improvement to design techniques to ensure ‘Zero Defect’ chips

What you need

• 14–25 yrs of experience
• Embedded C
• Verilog
• C++
• UVM
• C
• VLSI
• B.Tech or B.E.

Good to have

• Python
• Perl
• Test cases