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ASIC Digital Design, Principal Engineer- 13268

Synopsys (incl. Ansys)·Bengaluru

Pay not stated10–15 yrsFull-time
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About the role

Principal Engineer- Emulation/Validation- PCI/CXL/DDR/Ethernet Principal Engineer- Emulation/Validation- PCI/CXL/DDR/Ethernet

What you'll do

  • Close the gap between what Zebu Emulation IP provides out of the box and what your Design IP verification actually requires
  • Define technical requirements for Emulation IP feature sets, working directly with platform and IP teams to ensure correct implementation and deployment across…
  • Track and report emulation quality metrics, driving continuous improvement in IP performance, coverage completeness, and time to first pass
  • Stay ahead of evolving standards for PCIe, DDR, and Ethernet, translating ECNs, errata, and spec updates into actionable changes for both Emulation and Design IP teams
  • Review and validate test plans for Emulation IP and Design IP, ensuring traceability from requirements through coverage and guaranteeing best in class verification…

What you need

  • 10–15 yrs of experience
  • Test cases
  • Any graduate

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Can I apply
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Pay
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Source
From the company's careers page · today
How to apply
On Applied Materials' site: account needed, ~10–15 min
Early: posted 1 h ago on their own site