Principal Layout Designer

About the role

You must have the ability to understand design constraints and implement high-quality layouts. You must be proficient using Cadence VXL on periphery blocks. You must have strong debug and problem-solving skills for LVS, DRC & Layout issues. You must have hands-on experience in creating layout of critical Core/Pitch blocks such as Array, Row decoder & Column Decoder.

What you'll do

• Be responsible for coordinating with TD, Design, CAD and layout teams to deliver on schedule with quality
• Be required to meet all engineering and process related criteria needed for an assigned NAND product
• Organize and prioritize logistics and resource allocations to meet scheduled deadlines and proactively develop methodologies for issue resolution
• Be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tape-out processes and procedures

What you need

• 10–18 yrs of experience
• Circuit design
• Any graduate