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Principal Layout Engineer-DPG-LPDDR

Micron Technology·Hyderabad

Pay not stated15–27 yrsFull-time

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About the role

Principal Layout Engineer-DPG-LPDDR at Micron Technology. Lead full-chip floor planning, integration, physical implementation, signoff, and tape-out execution.

What you'll do

  • Lead full-chip floor planning, integration, physical implementation, signoff, and tape-out execution
  • Drive layout implementation of complex analog, mixed-signal, memory, and high-speed interface designs
  • Own DRC, LVS, ERC, EMIR, reliability, and manufacturability closure
  • Define and scale layout methodologies, best practices, and execution frameworks
  • Leverage Artificial Intelligence, Machine Learning, and Agentic AI to improve layout productivity, design quality, automation, and faster decision-making

What you need

  • 15–27 yrs of experience
  • VLSI
  • Python
  • LLMs
  • Machine learning
  • B.Tech or B.E. or M.Tech

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