Principal Logic Design Engineer

About the role

We are seeking a Principal Logic Design Engineer with deep expertise in micro-architecture and RTL design to lead the development of complex IPs/subsystems. The candidate will provide technical ownership across architecture, microarchitecture, RTL implementation, integration, and silicon bring-up.

What you'll do

• Lead RTL/microarchitecture development for complex connectivity IP/subsystems
• Translate specifications and system requirements into robust hardware architecture
• Design high-performance and scalable logic for controllers/subsystems
• Work across connectivity IP / subsystem layers including Transaction, Data Link, and Physical interface integration as applicable to the role
• Develop and review RTL using SystemVerilog/Verilog

What you need

• 10–18 yrs of experience
• Verilog
• Arbitration
• Root cause analysis
• VLSI
• Any graduate