R&D Engineering, Director #18050

About the role

R&D Engineering, Director #18050 at Synopsys (incl. Ansys). Lead a team of memory design engineers developing SRAM, Register File, TCAM, and ROM architectures and circuit implementations for advanced process nodes including FinFET.

What you'll do

• Lead a team of memory design engineers developing SRAM, Register File, TCAM, and ROM architectures and circuit implementations for advanced process nodes including FinFET
• Own the full memory design flow from bit cell analysis and architecture through schematic entry, simulation, layout planning, characterization, verification
• Drive low-power, area-efficient embedded memory circuit design and supervise layout activities
• Manage project timelines, prioritize tasks across multiple concurrent projects, and resolve technical and scheduling issues proactively to ensure on-time delivery
• Build and maintain relationships with cross-functional teams including characterization, verification

What you need

• 20–30 yrs of experience
• Python
• Circuit design
• Perl
• B.Tech or B.E. or M.Tech or M.Sc