Senior ASIC Design Engineer, GPU Core Pipeline IP

About the role

As a key member of our ASIC Design team, you will contribute to the design and implementation of graphics and compute features within an IP. You will develop RTL using Verilog/SystemVerilog, collaborate on design specifications, and ensure that designs meet performance, power, area, and timing goals.

What you'll do

• Contribute to the design and implementation of graphics and compute features within an IP
• Develop RTL using Verilog/SystemVerilog, collaborate on design specifications, and ensure that designs meet performance, power, area, and timing goals
• Work with HW architects and designers to make the right implementation choices
• Collaborate with verification engineers to ensure comprehensive validation and coverage of all implemented functionality

What you need

• VLSI
• Verilog
• Any graduate