Senior DDR & Execution Validation Engineer

About the role

Reporting to the Memory Validation leadership team, the Senior Silicon DDR/HBM Validation Engineer will be responsible for the bring-up, validation, characterization and debug of advanced memory subsystems used in next-generation AI compute platforms.

What you'll do

• Execute validation and bring-up activities for DDR and HBM memory subsystems
• Verify memory bring-up software, firmware and scripts against defined project requirements
• Debug firmware, hardware and system-level issues and contribute to root-cause analysis activities
• Analyse system logs, validation data and characterization results to identify failures and performance issues
• Perform PHY characterization and analog-level analysis during stress testing and validation activities

What you need

• Python
• Embedded C
• Instrumentation
• C
• Root cause analysis
• Performance testing
• Any graduate

Good to have

• Data structures