Senior Design Verification Engineer

About the role

We are looking to expand our team with a Senior Digital IC Verification Engineer . You will help us develop IP for next generation Automotive, Industrial & Medical products. The successful candidate will participate in the design of complex mix-signal IPs and have familiarity with analog blocks such as DACs, ADCs, PLL and wireless interface etc.

What you'll do

• Define the verification strategy and the detailed verification plans for blocks and systems
• Coordinate/lead the verification activities in the project teams
• Develop System Verilog/UVM environments for blocks and top-level SoCs
• Debug functional errors in RTL
• Participate to verification methodology improvement activities

What you need

• 3–6 yrs of experience
• UVM
• Python
• Verilog
• B.Sc or M.Sc or B.Tech or B.E.