Senior Design Verification Engineer, SSG

About the role

As a Senior Design Verification Engineer, you will contribute to exploring innovative hardware designs to enhance our devices. You will define verification methodology and implement test plans for advanced functional blocks while collaborating with cross-functional teams to develop world-class hardware devices.

What you'll do

• Contribute to exploring innovative hardware designs to enhance our devices
• Define verification methodology and implement test plans for advanced functional blocks while collaborating with cross-functional teams to develop world-class hardware…
• Participate in the bringup of such blocks on Simulation and Emulation platforms
• Work closely with multi-disciplinary groups including Architecture, RTL Design, PD, Validation
• Architect and implement verification environments for complex functional blocks

What you need

• 10–18 yrs of experience
• UVM
• FPGA
• Python
• Test cases
• Perl
• Verilog
• B.Tech or B.E. or PhD

Good to have

• C