Senior DFT Design/Micro Architect Engineer, Google Cloud

About the role

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU.

What you'll do

• Develop DFT strategy and architecture (e.g., hierarchical DFT, DFT for high-speed I/Os, Analog DFT)
• Develop and drive die-level DFT validation strategy, complete all Test Design Rule Checks (TDRC)
• Document DFT architecture, test sequences, and boot-up sequences associated with test pins
• Generate and deliver production and debug patterns to the post-silicon engineering team, and run diagnosis for post-silicon support
• If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form

What you need

• 8–14 yrs of experience
• GCP
• Circuit design
• Machine learning
• System design
• B.Tech or B.E. or PhD