Senior Digital IP Design Manager

About the role

Role Overview onsemi is seeking a Digital IP Design Manager to manage the design of digital datapath and subsystem IP for next-generation CMOS image sensors and the onsemi Treo platform . This role will manage a talented sub-team of digital design engineers , drive technical execution, and help shape the future of scalable, automotive‑grade digital IP design.

What you'll do

• Lead the design of digital datapath IP and modules for CMOS image sensors, including high‑performance, low‑power pipelines
• Ensure IP meets automotive quality, safety, and reliability requirements (e.g., robustness, configurability, reuse)
• Partner closely with architecture, DV, PD, analog, mixed-signal, system, full-chip integration, firmware, and software teams to deliver end-to-end solutions
• Provide technical guidance on RTL quality, low-power design, clocking/reset strategies, and design-for-test to design engineers
• Participate in technical reviews, risk assessment, and post-silicon learning

What you need

• 12–22 yrs of experience
• Verilog
• Machine learning
• Any graduate