Senior Engineer

About the role

As a part of Arm's Solutions Engineering group we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools and build the knowledge base that makes custom SoC and CPU chip design possible.

What you'll do

• RTL-GDS closure for Hard Macro
• Analyze DRC/LVS/PERC/ERC using Calibre and perform Layout edit for Physical Verification closure
• Analyze Timing using primetime and perform Timing ECO for design closure
• Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP
• Converting R&D concepts into real implementation solutions

What you need

• 3–6 yrs of experience
• Python
• Java
• JavaScript
• C++
• Verilog
• Perl
• B.Tech or B.E.

Good to have

• Travel booking
• VLSI
• HTML
• R
• C
• Ruby