Senior Engineer - CPU Verification (RISCV Vector,ALU, FPU Verification)

About the role

Senior Engineer - CPU Verification (RISCV Vector,ALU, FPU Verification) at SiFive. Own verification planning and execution for Vector, ALU, floating-point blocks from testplanning to unit level verification and integration to core level.

What you'll do

• Own verification planning and execution for Vector, ALU, floating-point blocks from testplanning to unit level verification and integration to core level
• Drive verification strategy, test planning, Testbench development, tests writing, debug, coverage analysis, and closure for complex Vector, ALU
• Define effective verification approaches for arithmetic, floating-point, operand dependency, bypass/forwarding, replay, flush/recovery, exception
• Develop robust verification environments, assertions, checkers, scoreboards, stimulus, and coverage models that expose corner cases and improve bug-finding efficiency
• Partner closely with architecture, design, and verification teams to review specifications, identify risk early, and improve verification completeness

What you need

• 4–7 yrs of experience
• Python
• C++
• UVM
• Verilog
• C
• B.Tech or B.E.