Senior IP DV Engineer - NOC IP

About the role

This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

What you'll do

• Be responsible for verifying the ASIC design, architecture and micro-architecture of memory sub-systems/units using advanced verification methodologies
• Understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design
• Coming up come up with test plans, tests and verification infrastructure for complex IPs/sub-systems
• Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology
• Work on advanced verification methodologies like SV/UVM

What you need

• 5–9 yrs of experience
• UVM
• Verilog
• VLSI
• Test cases
• Deep learning
• B.Tech or B.E. or M.Tech