Senior Lead Engineer

About the role

Experience 6-10 Years in high performance digital logic designs and SoC Integration using ARM Cores, Bus Protocols and Interconnects Building Subsystems and/or SoC RTL integration LINT/CDC/RDC signoffs for the highest design quality Perform all aspects of the SoC design flow from high level design to Synthesis

What you'll do

• Building Subsystems and/or SoC RTL integration
• Perform all aspects of the SoC design flow from high level design to Synthesis
• Conducting IP Integration reviews, BE reports reviews for concurrent engineering

What you need

• 6–10 yrs of experience
• B.Tech or B.E.

Good to have

• Embedded C