Senior Principal Verification Engineer

About the role

We are seeking an experienced Senior Principal ASIC/SoC Verification Engineer to join our dynamic and fast‑paced engineering team. In this role, you will be responsible for ensuring the functional correctness, robustness, and overall quality of our cutting‑edge semiconductor and SoC designs. If you thrive in a collaborative environment and enjoy solving complex technical challenges, this opportunity is an excellent fit.

What you'll do

• Verification Planning and Execution
• Develop and execute comprehensive SoC/IP‑level verification plans aligned with design specifications and project goals
• Drive verification closure through functional, code, and assertion coverage , ensuring high‑quality deliverables
• Apply industry‑standard ASIC/SoC verification techniques including test planning, testbench creation, constrained‑random and directed stimulus, assertions
• Perform SoC integration verification , validating interactions across subsystems, interfaces, and power/performance domains

What you need

• UVM
• Verilog
• C++
• Python
• C
• Perl
• Any graduate