Senior Silicon DFT Micro Architecture Engineer, Google Cloud

About the role

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

What you'll do

• Develop DFT strategy and architecture (e.g., hierarchical DFT, DFT for high-speed I/Os, Analog DFT)
• Develop and drive die-level DFT validation strategy, complete all Test Design Rule Checks (TDRC)
• Document DFT architecture, test sequences, and boot-up sequences associated with test pins
• Generate and deliver production and debug patterns to the post-silicon engineering team, and run diagnosis for post-silicon support
• If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form

What you need

• 8–14 yrs of experience
• GCP
• Circuit design
• System design
• B.Tech or B.E. or PhD