Senior /Staff AMS Layout engineer-DPG-LPDDR

About the role

Lead layout-aware co-design with circuit teams , enabling early closure of timing, noise, IR, EM, and parasitic effects, and influencing design decisions from a layout perspective Own physical verification and signoff closure : DRC/LVS, parasitic extraction, and simulation correlation

What you'll do

• Lead layout-aware co-design with circuit teams , enabling early closure of timing, noise, IR, EM, and parasitic effects
• Own physical verification and signoff closure : DRC/LVS, parasitic extraction, and simulation correlation

What you need

• Any graduate