Senior Staff ASIC Design Engineer

About the role

Micro-architecture design, RTL coding, synthesis, timing closure, and documentation of various RTL blocks Collaboration with firmware, software, DV, FPGA, DFT, SoC integration, and backend teams throughout various stages of ASIC development.

What you'll do

• Help develop the design and implementation/ integration of SoCs
• Support prototyping, test program development, chip validation, and chip life until production maturity

What you need

• 12–22 yrs of experience
• VLSI
• FPGA
• Verilog
• Python
• Perl
• Prototyping
• Any graduate

Good to have

• Bug tracking
• JIRA
• Git
• Jenkins