Senior Staff Engineer Design

About the role

We are seeking an experienced Senior Staff Engineer with 8+ years of expertise in SoC architecture, microarchitecture development, RTL design, low-power methodologies, and post-silicon debug. The candidate will drive end-to-end SoC design activities, collaborate with cross-functional teams, and provide technical leadership to ensure successful silicon development and product delivery.

What you'll do

• Define and develop SoC architecture and microarchitecture for complex semiconductor products
• Design and implement RTL using Verilog/System Verilog
• Architect and optimize low-power solutions utilizing UPF methodologies
• Develop and review clock, reset, power, DMA, and interconnect architectures
• Perform and analyze CDC (Clock Domain Crossing), Lint, CLP (Convergence Low Power), and PTPX power analysis

What you need

• 8–14 yrs of experience
• Verilog
• VLSI
• FPGA
• Root cause analysis
• Customer success
• Prototyping
• B.Tech or B.E.