Senior Staff / Principal Engineer, AMS Verification

About the role

We are seeking an AMS Verification Engineer to lead verification of the digital content embedded within power, analog, and mixed-signal IC products. This is a senior individual-contributor role requiring ownership of verification architecture, methodology, execution, and sign-off at block and full-chip level.

What you'll do

• Verification Strategy & Ownership
• Own block-level and full-chip digital verification strategy for power, analog, and mixed-signal IC products
• Develop verification plans from product and design specifications, including feature extraction, test intent, coverage goals, assumptions, and sign-off criteria
• Decompose complex functions into reusable verification components and scalable environments
• Identify specification gaps and drive closure with architecture, analog design, digital design, applications, and test teams

What you need

• 10–18 yrs of experience
• UVM
• Verilog
• Python
• Perl
• Root cause analysis
• Circuit design
• B.Tech or B.E. or M.Tech

Good to have

• FPGA