Senior Staff Verification Engineer

About the role

Senior Staff Verification Engineer position is your opportunity to join one of the industry’s leading companies in Smart Edge SoCs for network/systems control, management security systems, and IIoT. You should have prior knowledge and experience with UVM verification and UVM environment development.

What you'll do

• Help develop test plan definition and development
• Micro-architecture design verification, RTL verification, and documentation
• Top-level and block-level performance verification, power, and use-case verification; and
• Support test program development, chip validation, and chip life until production maturity
• Team Management and Building

What you need

• 10–18 yrs of experience
• UVM
• C
• Verilog
• Python
• Test cases
• Perl
• Any graduate

Good to have

• FPGA