Sr Engineer, CPU Implementation & Flow Automation

SiFive·Bengaluru

Pay not stated3–6 yrsFull-time

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About the role

As a Senior Physical Design Engineer , you will be responsible for executing and optimizing the RTL-to-GDS implementation flow for our high-performance CPU cores. In this role, you will take ownership of block-level implementation and contribute to advanced design recipes to drive PPA (Power, Performance, Area) closure on leading-edge N3/N2 process nodes.

What you'll do

Technical Execution & Troubleshooting: Identify, debug, and resolve flow and tool-related issues at the block level
Cross-Functional Collaboration: Partner with IP teams (SRAM/Std Cell) and technical leads to analyze and model PPA impacts within your design blocks

What you need

3–6 yrs of experience
Python
Data analysis
VLSI
Travel booking
Machine learning
Any graduate

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