Sr. Lead Physical Design - Power/IR/EM Engineering

About the role

This position is for senior level engineer Full chip level Power Distribution Network Design. He Shall be leading instrumental in power grid planning on SoC level for peak current requirements & to have Dynamic & Static IR drop assessment & closure.

What you'll do

• Can provide Feedback on Grid Robustness to SOC floorplan team
• Working with the system, PMIC and silicon package team to model the voltage response of the power delivery network
• Model of the power delivery networks, including on-die power gating and in-rush current profiles
• Model of the current profiles and peak current demands of various IPs

What you need

• 10–18 yrs of experience
• VLSI
• Power systems
• B.Tech or B.E.