Sr . Principal Verification Engr

About the role

We are looking for an experienced Senior SoC Verification Lead with 15+ years of expertise in pre-silicon SoC verification. The ideal candidate will have strong hands-on experience in UVM, SystemVerilog, Verilog, and C , and a proven track record of leading end-to-end SoC verification, developing robust verification environments, and driving silicon readiness

What you'll do

• Lead pre-silicon SoC verification activities end-to-end
• Define and execute SoC-level verification strategies and plans
• Develop and maintain UVM based verification environments
• Create verification plans from architectural requirements
• Low power intent verification using CPF, UPF

What you need

• 15–27 yrs of experience
• Verilog
• UVM
• Any graduate