Sr Staff High-Speed I/O Design Engineer

About the role

Sr Staff High-Speed I/O Design Engineer at Synopsys (incl. Ansys). Define analog PHY architectures for UCIe and high-speed die-to-die interfaces, translating system requirements into circuit-level specifications for transmitters.

What you'll do

• Define analog PHY architectures for UCIe and high-speed die-to-die interfaces, translating system requirements into circuit-level specifications for transmitters
• Build behavioral models for link performance analysis, jitter budgeting, BER estimation
• Verify designs across PVT corners, Monte Carlo mismatch, aging, reliability, and post-layout parasitic extraction
• Analyze package, interposer, substrate, and channel effects including insertion loss, return loss, crosstalk, common-mode voltage, and eye closure
• Support floor planning, layout reviews, parasitic back-annotation, and design sign-off, ensuring circuits meet area, power, and performance targets

What you need

• 8–15 yrs of experience
• Circuit design
• MATLAB
• Python
• Physics
• Calibration
• Root cause analysis
• B.Tech or B.E. or M.Tech