- Can I apply
- Needs PhD or B.Tech or B.E. · 7–13 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 1 h ago on their own site
Read from the company's own careers page; you apply on their site.
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About the role
We are seeking a highly skilled and experienced STA Methodology Engineer to join our CTO-DE-FDIP-Logic Libraries team. In this role, you will be responsible for benchmarking various logic libraries across multiple technology nodes (40nm, 14nm, 10nm, 7nm, 5nm) using synthesis and PNR-based flows on real-world chips and blocks.
What you'll do
- Benchmark logic libraries across advanced technology nodes using synthesis and PNR flows
- Collaborate with cross-functional teams to validate and refine timing constraints
- Develop and maintain benchmarking frameworks for constraint validation and STA methodology evaluation
- Perform comprehensive STA including timing analysis, DRCs, annotation issues, multivoltage flow enablement
- Contribute to the development and automation of STA flows and methodologies
What you need
- 10–12 yrs of experience
- B.Tech or B.E.
Good to have
- Python
- LLMs
Similar jobs
- Can I apply
- Needs PhD or B.Tech or B.E. · 7–13 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 1 h ago on their own site
- Can I apply
- Needs PhD or B.Tech or B.E. · 7–13 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 1 h ago on their own site
- Can I apply
- Needs PhD or B.Tech or B.E. · 7–13 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 1 h ago on their own site