Staff Design Verification Infrastructure Engineer - VIPs and Testbench

About the role

An ideal candidate will be a strong Design Verification engineer with a solid understanding of software engineering. You will be expected to collaborate with Design Verification engineers to develop reusable testbench components and integrate them within SiFive’s Chisel-based Verification Platform..

What you'll do

• Develop Verification Platform libraries for expressing verification intent in Scala with Chisel, including test harnesses, stimulus, scoreboards, and other generators
• Develop Verification Platform VIPs, AIPs, and other testbench components using System Verilog, UVM, and other related technologies
• Develop Verification Platform test plans and testbenches to verify and release testbench components with high quality
• Educate the Design Verification and other verification and validation teams on best practices and how to achieve them with the Verification Platform

What you need

• UVM
• Verilog
• Scala
• Test cases
• Any graduate

Good to have

• Python