Staff Engineer- AMS Verification

About the role

Play a key role in the development and implementation of advanced System Verilog real-number modelling methodologies for analog/mixed-signal(AMS) verification, optimizing speed and accuracy trade-offs for pre-silicon validation. Your role Key responsibilities in your new role

What you'll do

• Collaborate with design and verification teams to define and refine functional verification plans for AMS blocks
• Develop and maintain custom verification frameworks that incorporate mixed-signal and digital simulation environments using industry-leading tools such as Xcelium and VCS
• Create, validate, and deploy behavioral models for AMS components, ensuring compatibility with the digital verification environment and system-level requirements
• Identify bottlenecks in current AMS verification flows and proposeinnovative solutions to enhance efficiency, scalability, and coverage
• Provide technical mentorship and training to junior engineers, fostering expertise in AMS verification techniques and best practices

What you need

• Verilog
• Python
• Customer success
• Perl
• Any graduate

Good to have

• Circuit design
• UVM