STAFF ENGINEER, DDEG Design Methodology

About the role

Complete ownership of verification and end to end analysis of sophisticated full chip gate level custom designs with advanced low power and power management technologies spread across multiple categories such as DDR4,LPDDR4,DDR5 and LPDDR5 that can operate at high speeds of up to 6400MT/s. Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design.

What you'll do

• Accelerate verification cycle time
• Assist in Test-Case/TB and various other components required for DRAM Design Verification
• Improve debug efficiency across simulation and silicon learning loops
• Strong judgment to validate AI outputs before use (review assumptions, align with specs/standards, cross-check with simulations, waveforms, assertions
• Provide verification support to design projects by simulating, analyzing

What you need

• Verilog
• UVM
• Test cases
• B.Tech or B.E.

Good to have

• Python
• Perl