Staff ENGINEER, HIG HBM-ARCHITECTURE

About the role

This role is critical to ensuring quality, yield, and performance across complex multi‑die architectures. You’ll influence product success early, work hands-on with silicon, and partner closely with design, test, and manufacturing teams.

What you'll do

• Define and implement end-to-end DFT architectures for HBM base die and DRAM die
• Develop DFT strategies for stacked-die, cube-level, and system-level test flows
• Architect test access mechanisms supporting wafer probe through final test
• Enable silicon observability for yield learning, debug, and failure analysis
• Collaborate across design, verification, layout, test, and manufacturing teams

What you need

• 5–9 yrs of experience
• B.Tech or B.E.