Staff Verification Design Engineer

About the role

Staff Verification Design Engineer at Semtech_Advanced_Systems_India_Private_Ltd_v2. Perform block and chip-level verification in register-transfer level (RTL), gate-level and analog/mixed-signal (AMS).

What you'll do

• Perform block and chip-level verification in register-transfer level (RTL), gate-level and analog/mixed-signal (AMS)
• Run digital/mixed-signal simulations as well as formal verification
• Work closely with the design team to create verification strategy and detailed verification plan
• Develop tests, run regressions and monitor coverage to ensure tape-out quality
• Participate in design or project reviews and support these with verification perspective and schedule/priority assessment

What you need

• 3–6 yrs of experience
• Verilog
• UVM
• Python
• Perl
• VLSI
• Any graduate