- Can I apply
- Needs PhD or B.Tech or B.E. · 7–13 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 1 h ago on their own site
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About the role
Synthesis Engineer, Lead/Staff/Sr Staff at Qualcomm. Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation.
What you'll do
- Development of signoff quality constraints and the development of power intent constraints
- TCL script development in addition to running/analyzing/debugging designs
- Hands on with Synopsys DCG/Genus/Fusion Compiler
- Hands on with Synopsys Prime Time including constraint development for complex blocks with multiple clock domains
- Hands on with Cadence Conformal LEC and Cadence Conformal Low Power including UPF development
What you need
- 9–13 yrs of experience
- Python
- Perl
- B.Sc or B.Tech or B.E. or BCA or M.Sc or M.Tech or MCA
Good to have
- VLSI
Similar jobs
- Can I apply
- Needs PhD or B.Tech or B.E. · 7–13 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 1 h ago on their own site
- Can I apply
- Needs PhD or B.Tech or B.E. · 7–13 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 1 h ago on their own site
- Can I apply
- Needs PhD or B.Tech or B.E. · 7–13 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 1 h ago on their own site