System Validation Engineer (New Grads)

About the role

The successful candidate will join SiFive's System Validation team, which is responsible for the validation of SiFive's RISC-V CPUs utilizing FPGA-based platforms. This role extends beyond FPGA platforms to include development and bring-up boards.

What you'll do

• Execute root cause and failure analysis across RISC-V CPU hardware and software components
• Utilize ILA and JTAG debuggers to troubleshoot and validate FPGA designs
• Develop failure hypotheses through systematic, step-by-step elimination of potential causes
• Create and support Python-based scripts to enhance and automate debug workflows

What you need

• Python
• FPGA
• Verilog
• Linux
• Bash
• B.Tech or B.E. or B.Sc or BCA or M.Tech or MCA or M.Sc