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Tech Lead, Asic Design

Astera Labs·Bengaluru

Pay not stated6–11 yrsFull-time

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About the role

You'll own design execution on complex blocks across our purpose-built products, working at the cutting edge of PCIe, CXL, Ethernet, and emerging rack-scale interconnect technologies. This is a high-impact technical role at a hyper-growth company. You'll partner closely with architecture, verification, DFT, and physical design teams to take features from spec to silicon, while contributing to the design methodology that scales with our roadmap.

What you'll do

  • RTL Design & Implementation
  • Own RTL design for assigned blocks from microarchitecture through synthesis sign-off
  • Develop high-quality, synthesizable Verilog/SystemVerilog with strong attention to PPA
  • Drive design reviews, lint, CDC, and timing closure activities to silicon-ready quality
  • Partner with architecture to translate specifications into implementation-ready microarchitecture

What you need

  • 6–11 yrs of experience
  • VLSI
  • Verilog
  • B.Tech or B.E. or PhD

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