Technical Lead - Chiptile-PD-PV,Full Chip PNR

About the role

Lead chiplet or tile-level physical implementation and integration, ensuring PPA, timing, power integrity, and physical verification closure.

What you'll do

• Own floorplan, placement, CTS, routing, and optimization
• Drive timing, congestion, power, and area closure
• Resolve DRC, LVS, antenna, and density issues
• Coordinate tile interfaces and full-chip integration requirements
• Lead technical reviews, risk mitigation, and signoff readiness- RedHawk / Voltus expertise

What you need

• 8–12 yrs of experience
• B.Tech or B.E. or M.Tech

Good to have

• Python