Verification Engineer - Networking IPs

About the role

We are seeking enthusiastic, driven, and imaginative individuals to join our networking group. As the owner of networking IP's unit and cluster level verification, you will contribute to projects crafting the future of our datacenter chips and systems. You will gain direct experience of chip working with high-performance queuing and scheduling sub-systems.

What you'll do

• Develop verification components and API's for unit and cluster level test benches. These will verify queuing and scheduling algorithms and designs
• Architect the testbenches and craft verification environment using Specman language and methodology
• Define test plans, tests and verification infrastructure for clusters and systems
• Build efficient and reusable bus functional models, monitors, checkers, and scoreboards
• Implement functional coverage and own unit/cluster level verification closure

What you need

• 3–6 years in electrical & electronics
• Networking
• FPGA
• Test cases
• B.Tech or B.E. or M.Tech

Good to have

• UVM

What you get