Architect Digital Design -High Speed Memory Interface IP- HBM/DDR/LPDDR

About the role

Architect Digital Design -High Speed Memory Interface IP- HBM/DDR/LPDDR at Synopsys (incl. Ansys). Define and own the digital architecture for HBM, DDR, or LPDDR memory controllers, from high-level partitioning through RTL implementation strategy.

What you'll do

• Define and own the digital architecture for HBM, DDR, or LPDDR memory controllers, from high-level partitioning through RTL implementation strategy
• Drive design plans for complex memory interface blocks, balancing performance, area, power, and verification complexity across chip and block levels
• Collaborate with PHY teams, verification engineers, and product architects to ensure seamless integration and protocol compliance
• Evaluate and select design methodologies, tools, and flows that improve quality, reduce cycle time, and scale across product lines
• Mentor engineers on architecture decisions, RTL best practices, and debug strategies for high-speed memory interfaces

What you need

• 12–15 yrs of experience
• Data structures
• Any graduate